The inventive concept relates to semiconductor devices and methods of manufacturing the same, more particularly, to semiconductor devices having via-holes and methods of manufacturing the same.
A wafer of a gallium nitride-on-silicon (111) structure may use a bulk silicon substrate as a handle wafer. When compound semiconductor devices and micro-electromechanical system (MEMS) devices having membrane structures are manufactured using the wafer of the gallium nitride-on-silicon (111) structure, polishing techniques such as a chemical mechanical polishing (CMP) technique and a lapping technique are presently used in order that a thickness of a membrane exactly meets a designed numerical value. However, the polishing techniques may require many trials and errors for exactly controlling a thickness of several tens micrometers, such that various problems may occur during processes using the polishing techniques described above.
Meanwhile, through-silicon-via (TSV) techniques have been suggested for manufacturing devices having excellent electrical and thermal characteristics. However, when a TSV is manufactured using a thinned handle wafer, a warpage phenomenon of a wafer may occur. Thus, a remaining stress of the wafer should be controlled and/or a dummy stress buffer layer should be added on the wafer during the process.